Course on Timing Analysis of digital circuits

The department of ECE is going to start a new course from 08/10/2018 on “Timing analysis of digital circuits”. The aim is to target the VLSI jobs offered by companies like Analog Devices, Texas Instruments, Cadence etc.

Days : Monday, Tuesday.
Timing : 4 – 5 PM
Venue: EC – 213

Contents :

1. Introduction to the timing and digital circuits
2. Review of digital circuits- combinational and sequential
3. Timing parameters of combinational circuits- propagation and contamination delay
4. Timing parameters of sequential circuits- setup time and hold time
5. Clock frequency and its determination
6. Min. – max. timing paths
7. Critical path delays
8. Problems on timing analysis